>The source is pretty well commented, mostly inline ASM and I guess an instruction is an instruction (:-)). A lot of this stuff is not exactly rocket science. For example, one of the timing mechanisms is counting how many cycles per instruction etc.

Gack! I haven't looked at ASM since 1987, and then it wasn't for this processor family. I think I'll leave this one to someone else< g >. I've got no compelling desired to learn it either < s >.